top Project Status (05/25/2013 - 07:43:49)
Project File: vtachspartan.xise Parser Errors: No Errors
Module Name: top Implementation State: Programming File Generated
Target Device: xc3s1000-4ft256
  • Errors:
No Errors
Product Version:ISE 13.2
  • Warnings:
122 Warnings (9 new, 51 filtered)
Design Goal: Timing Performance
  • Routing Results:
All Signals Completely Routed
Design Strategy: Performance without IOB Packing
  • Timing Constraints:
All Constraints Met
Environment: System Settings
  • Final Timing Score:
0  (Timing Report)
 
Device Utilization Summary [-]
Logic UtilizationUsedAvailableUtilizationNote(s)
Number of Slice Flip Flops 237 15,360 1%  
Number of 4 input LUTs 557 15,360 3%  
Number of occupied Slices 347 7,680 4%  
    Number of Slices containing only related logic 347 347 100%  
    Number of Slices containing unrelated logic 0 347 0%  
Total Number of 4 input LUTs 597 15,360 3%  
    Number used as logic 557      
    Number used as a route-thru 40      
Number of bonded IOBs 32 173 18%  
Number of RAMB16s 1 24 4%  
Number of BUFGMUXs 3 8 37%  
Number of DCMs 1 4 25%  
Average Fanout of Non-Clock Nets 3.29      
 
Performance Summary [-]
Final Timing Score: 0 (Setup: 0, Hold: 0, Component Switching Limit: 0) Pinout Data: Pinout Report
Routing Results: All Signals Completely Routed Clock Data: Clock Report
Timing Constraints: All Constraints Met    
 
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis ReportCurrentSat May 25 07:43:22 2013020 Warnings (9 new, 0 filtered)4 Infos (0 new, 0 filtered)
Translation ReportCurrentSat May 25 07:43:28 2013001 Info (0 new, 0 filtered)
Map ReportCurrentSat May 25 07:43:37 2013051 Warnings (0 new, 0 filtered)5 Infos (0 new, 0 filtered)
Place and Route ReportCurrentSat May 25 07:43:43 2013000
Power Report     
Post-PAR Static Timing ReportCurrentSat May 25 07:43:45 2013004 Infos (0 new, 0 filtered)
Bitgen ReportCurrentSat May 25 07:43:49 2013051 Warnings (0 new, 51 filtered)2 Infos (0 new, 0 filtered)
 
Secondary Reports [-]
Report NameStatusGenerated
ISIM Simulator LogOut of DateWed May 22 23:22:19 2013
Physical Synthesis ReportCurrentSat May 25 07:43:37 2013
WebTalk ReportCurrentSat May 25 07:43:49 2013
WebTalk Log FileCurrentSat May 25 07:43:49 2013

Date Generated: 05/25/2013 - 07:43:49